AI/GPU-Accelerated Place&Routing Engine
Features
Place
Global Route
Timing Analysis
Physical Optimization
End-to-end AI/GPU empowerment
Place
- GPU accelerated
- Timing driven
- Routability driven
- Region & density constraints
- AI-powered multi-objective optimization
Optimization
- GPU-accelerated STA with high correlation to golden tools
- GPU-accelerated Global Router and RC estimation
- GPU-accelerated optimization operators
- AI-powered design space exploration
Open & Adaptive
- Full PDK support down to 7nm
- Extensible python API with interactive shell and user-defined function
- Full observability & controllability via Python API, seamlessly integrate with any AI workflow
Our Vision
Agile, AI-Augmented Design Flows for Faster, Smarter Chips
We envision a future where digital chip design is no longer fragmented across siloed tools and manual iterations. By unifying AI/GPU-accelerated physical implementation with other front-end engines, enable a truly AI-Augmented, agile design flow. Further, intelligent AI Agents that autonomously explore the design space, co-optimize synthesis and placement decisions, and continuously learn from past projects.
Our mission is not to merely accelerate existing workflows, but to fundamentally reinvent how chips are designed — making intelligence, integration, and acceleration the new standard for digital implementation.
Contact us
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FAQ
Q: Install requirements
A:
- Linux x86-64 operating system
- NVIDIA GPU with compute capability >= 5.2
- CUDA driver installed
- HeteroPlace has been tested and is confirmed compatible with driver versions from 520.56.06 up to 530.30.02
Q: What input files does HeteroPlace require, and can it be integrated with mainstream APR tools?
A:
Yes, HeteroPlace is designed to integrate seamlessly with industry-standard tools, enabling agile physical implementation flows.
It accepts the following standard input formats:
- LEF / TLEF – Technology and cell abstracts
- DEF – Design layout and placement information
- Netlist (Verilog) – Structural gate-level description
- Liberty Library (.lib) – Timing and power characteristics of standard cells
- SDC – Timing, clock, and design constraints
- RC Configuration File – Layer stack and parasitic extraction rules
Q: Can HeteroPlace run on a CPU-only server (without a GPU)?
A:
Yes. While the algorithms are optimized for GPU acceleration, they also fully support multi-core CPU execution.
The CPU runtime is highly scalable and has been validated to deliver strong performance gains on systems with 128 cores or more, making it well-suited for large-scale, GPU-free compute environments.
Getting Involved
Bug report, feature request, questions are welcome! Please raise them at GitHub Issues.